MeitY’s Grant-In-Aid Project For Chips To Startup (C2S) Program Has Been Awarded To IIT Kanpur And Silizium Circuits Jointly

The Indian Institute of Technology (IIT) Kanpur, in collaboration with Silizium Circuits Private Limited, has received a Rs 5 crore grant-in-aid project from the Ministry of Electronics and Information Technology (MeitY) for its ground-breaking project, “Radio-frequency (RF) Transceiver SoC (System on Chip) with integrated RISC V core for Sub-GHz Applications.”

“IIT Kanpur has always been fostering innovation, promoting entrepreneurship, and driving technology commercialization,” stated Prof. Abhay Karandikar, Director of IIT Kanpur. The initiative, which intends to create a SoC that supports all of the major sub-GHz standards, will stimulate innovation in IoT and indoor applications. The development has enormous market potential and would strengthen India’s leadership in complicated SoC research and development.”


The project will last three years, and IIT Kanpur, as the nodal agency, will be in charge of generating major mixed signal IPs, while Silizium Circuits will design the RF front end and system-on-Chip (SoC) as well as commercialization.

“Semiconductor IPs (intellectual property) will be the brain of all hardware devices,” said Mr. Rijin John, co-founder and CEO of Silizium Circuits. Such a SoC that supports all major sub-GHz standards would promote innovation in IoT and indoor applications, which are expected to generate $1.3 trillion in revenue by 2030. Along with the final SoC, IPs such as ADCs (Analogue to Digital Convertors), PLLs (Phase Locked Loops), and RF front ends will be developed, with the potential to target a $488 billion global market. All low-power applications globally in the future will require an ultra-low-power receiver since it must always be alert to an incoming signal.”

Dr. Arun Ashok, co-founder and CTO, explains, “The developed SoC will have an RF front end capable of transmitting in sub-1 GHz UHF frequencies and will be compatible with various standards like LoRa, 802.15.4 WLAN, ZigBee, and WiSUN. It will also support modulation formats like FSK, MSK, 4-FSK, GFSK, GMSK, ASK, FSK, FM, and PSK, hence forming the backbone of most of the long-range, wide, and narrowband communications. In addition to the RF front end, the planned SoC will include an indigenous RISC-V core powered by a SHAKTI/VEGA processor, allowing support for a wide range of modulation formats for the aforementioned standards.”

This project’s investigators are Prof. Imon Mondal, Prof. Chithra, and Prof. R. S. Ashwin Kumar from IIT Kanpur, as well as Dr. Arun Ashok and Mr. Rijin John from Silizium Circuits. The project is supported by the end-user, ATWIC R&D, an innovative company focusing on developing electronic systems and subsystems.

Prof. Imon Mondal, Department of Electrical Engineering, IIT Kanpur, stated, “This SoC is uniquely positioned to address the needs of several wireless segments and applications such as sub-GHz WiFi, narrowband IoT, electric metres, and secure wireless infrastructure, besides being a critical aspect of secure wireless infrastructure.”

The segments mentioned above are known as the Internet of Things (IoT) or Machine-to-Machine Communication (MMC), in which a large number of sensors communicate wirelessly with one another. In 2019, the number of such devices in use surpassed 7.6 billion, with a projected increase to 24 billion by 2030. Because many utilities, telecommunications, automotive, consumer, and industrial infrastructures rely on secure wireless networks, such devices are critical for national security.

This project, according to IIT Kanpur and Silizium Circuits, is a watershed moment in India’s semiconductor ambitions. Although Indian engineers make important contributions to microelectronics, the majority of their activities are limited to the service industry. The environment has changed dramatically, with numerous entrepreneurs in this space benefiting from MEITY R&D funding and the DLI scheme.